Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...
Patent
1995-05-05
1997-08-05
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With peripheral feature due to separation of smaller...
257208, 257210, H01L 2178, H01L 2702, H01L 2934, H01L 2712
Patent
active
056545827
ABSTRACT:
A semiconductor wafer and semiconductor device manufactured from the wafer. The wafer has a conductive layer 33A intermittently formed in the longitudinal direction of a scribe area 2. The conductive layer's width shorter width than its length and shaped so that the scribe area is cut in the longtitudinal direction including the location of said width. The invention provides a semiconductor wafer not giving rise to faults, such as short-circuiting due to shavings, and not requiring any modification in the scribed width, blade width, or pad size when sawing conductive layers in the scribe area, such as the above-mentioned pads of the TEG.
REFERENCES:
patent: 4967259 (1990-10-01), Takagi
patent: 5136354 (1992-08-01), Morita et al.
patent: 5414297 (1995-05-01), Morita et al.
Hattori Hitoshi
Kijima Kazuhiro
Crane Sara W.
Donaldson Richard L.
Guttman David S.
Texas Instruments Incorporated
Williams Alexander Oscar
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