Single-chip contact-less read-only memory (ROM) device and the m

Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – Mesa structure

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257208, 257314, 257401, H01L 2906

Patent

active

061216704

ABSTRACT:
To obtain a small contact-less memory device, a memory device includes a semiconductor chip having a first surface and a second surface located at a level lower than that of the first surface, a memory cell array formed on the second surface, a peripheral circuit, for operating the memory cell array, formed on the first surface, and a connecting portion, for electrically connecting the memory cell array to the peripheral circuit, formed on the first surface.

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European Search Report dated Nov. 12, 1997; Application EP97113129.

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