Silicided shallow junction formation and structure with high and

Details Silicided shallow junction formation and structure with high and Silicided shallow junction formation and structure with high and

1997-12-06

2000-01-04

Mintel, William

Active solid-state devices (e.g., transistors, solid-state diode

With metal contact alloyed to elemental semiconductor type...

257768, 257757, 257770, H01L 2348, H01L 2352, H01L 2940

Patent

active

060112727

ABSTRACT:
A method, and structure resulting therefrom, of forming a metal silicide at a shallow junction of a diode in a single crystalline substrate without encroaching on the shallow junction by forming a metal layer on the substrate over the junction followed by forming a layer of a silicon material which reacts with the metal faster than the silicon in the single crystal substrate. Titanium is the preferred metal and amorphous silicon is the preferred silicon layer and is of a thickness to react with most of the titanium. The two layers are rapid thermal annealed to form titanium silicide. A second rapid thermal anneal is performed which converts the majority of the C49 phase of the titanium silicide to a less resistive and a more stable and conductive C54 phase and causes a silicon epitaxial layer to form between silicon substrate and the titanium silicide. The method and resulting structure can be used with a conventional method of fabricating diodes with different or varying breakdown voltages and leakage currents.

REFERENCES:
patent: 4629520 (1986-12-01), Ueno et al.
patent: 5759899 (1998-06-01), Saito

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