Patent
1989-07-17
1992-09-22
James, Andrew J.
357 75, 357 80, H01L 2332
Patent
active
051501961
ABSTRACT:
A hermetically sealed integrated wafer wherein the integrated wafer is sandwiched between a support layer and expansion buffering layer. The expansion buffering layer includes a centrally-located opening through which integrated circuits located on the wafer may extend. A sealing ring and cover plate are bonded to the expansion buffering layer to provide hermetic sealing of integrated circuits or other electronic elements located on the wafer.
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Fong Stewart O.
Yamamoto Kio
Denson-Low W. K.
Hughes Aircraft Company
James Andrew J.
Lachman M. E.
Nguyen Viet Q.
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