1987-05-11
1988-05-24
Wojciechowicz, Edward J.
357 13, 357 20, 357 34, 357 37, 357 51, 357 55, H01L 2906
Patent
active
047469676
ABSTRACT:
This invention relates to high breakdown voltage semiconductor devices and consists in a semiconductor device formed with a highly doped impurity region of the same conductive type as the semiconductor substrate, wherein the highly doped impurity region projects by a prescribed amount opposite a first impurity region and is formed at the back face of the semiconductor substrate, its projecting width T being in the same position as the middle of the first impurity region and being such as to satisfy t1.ltorsim.T.ltorsim.t1+2W0, where t1 is the width of the first impurity region, and W0 is the separtion in the depth direction between the first impurity region and the highly doped impurity region.
REFERENCES:
patent: 4412378 (1983-11-01), Shinada
patent: 4452645 (1984-06-01), Chu et al.
Jan W. Slotboom, "Computer-Aided Two-Dimensional Analysis of Bipolar Transistors", IEEE Transactions on Electron Devices, vol. Ed-20, No. 8, pp. 669-679, Aug. 1973.
Emoto Takao
Shiomi Takeo
Kabushiki Kaisha Toshiba
Wojciechowicz Edward J.
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