System and method for incrementing memory addresses in a compute

Details System and method for incrementing memory addresses in a compute System and method for incrementing memory addresses in a compute

1989-06-26

1996-08-13

Pan, Daniel H.

Boots, shoes, and leggings

364DIG1, 364DIG2, G06F 742

Patent

active

055465927

ABSTRACT:
A system and method for tracking a plurality of addresses. The system comprises a plurality of registers, each register storing a current address and having an input and an output. Each input is connected to a data bus through a first multiplexer and each output is connected to an address bus through a second multiplexer. The system further comprises an adder connected between the address bus and the first multiplexer. The adder increments a current address appearing on the address bus while the address in on the bus and generates a next address.

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