Composite logic circuit

Details Composite logic circuit Composite logic circuit

1993-04-14

1994-07-26

Hudspeth, David R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307451, H03K 19094

Patent

active

053329368

ABSTRACT:
When a transistor 1 is turned off, and transistors 5 and 7 are both turned on, first and second output signals Oa and Ob both attain a first potential GND irrespective of the logic level of a second logic signal Ib and a third logic signal /Ib. When the transistor 1 is turned on and the transistors 5 and 7 are both turned off by the first logic signal Ia, a transistor 4 is turned off and a transistor 6 is turned on, whereby first and second output signals Oa and Ob attain a second potential VEE and the first potential GND, respectively. When the transistor 1 is turned on, and transistors 5 and 7 are turned off, the transistor 4 is turned on and the transistor 6 is turned off, whereby the first and second output signals Oa and Ob attain the first potential GND and the second potential VEE, respectively. Thus a composite logic circuit can be implemented with 7 transistors.

REFERENCES:
patent: 4486670 (1984-12-01), Chan et al.
patent: 4703199 (1987-10-01), Ely
patent: 4920284 (1990-04-01), Denda
patent: 4978870 (1990-12-01), Chen et al.
patent: 5013937 (1991-05-01), Aoki
patent: 5136190 (1992-08-01), Chern et al.

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