Semiconductor memory

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

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Details

257296, 257773, 257907, 257401, H01L 2702, H01L 2348, H01L 2968

Patent

active

053329236

ABSTRACT:
A semiconductor memory is provided which comprises memory cell regions disposed on a substrate, word lines which are connected respectively to the memory cells in the memory cell regions for controlling at least reading information from the memory cells, first bit lines which are formed in a first layer on the substrate and connected respectively to the memory cells for transmitting information, and second bit lines which are formed in a second layer and connected respectively to the memory cells for transmitting information, the second layer being formed on the substrate and electrically insulated from the first layer. The limitation of the layout upon the decrease of the bit line pitch can be eliminated, so that the reduction of the chip occupation area by shrinkage of areas between each adjacent memory cell regions can be realized. The first and second bit lines each is preferable to be patterned like stairs. The first and second bit lines are preferable to be disposed so as to go around the connecting area of the capacitor element for storing information and switching transistor in the memory cell.

REFERENCES:
patent: 4583111 (1986-04-01), Early

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