Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Patent
1991-08-21
1993-01-19
Hoff, Marc
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
341159, H03M 138
Patent
active
051810352
ABSTRACT:
An N-bit interpolation analog/digital circuit comprises a first stage of p comparators (C.sub.1. . . C.sub.p). The outputs of the comparators are combined in a plurality of groups, which are connected so that the combined output (S.sub.1a, S.sub.1b) of each group has the shape of a signal periodically varying between high and low levels. The output voltages of each group are compared close to their zero crossings in second stages (I.sub.1. . . I.sub.r) of q+1 comparators each (p[q+1]=2.sup.N). Each comparator of the first stage is a high linearity comparator comprising two legs each comprising a first and a second transistor (T.sub.101, T.sub.102 ; T.sub.103, T.sub.104). The base of the second transistor of each leg is connected at the junction node of the transistors of the other leg through a voltage shifting means (E.sub.1, E.sub.2), and the emitters of the second transistors of each leg are interconnected through a resistor (RES).
REFERENCES:
patent: 4591830 (1986-05-01), Hanna
patent: 4599602 (1986-07-01), Matzuzawa et al.
patent: 4774498 (1988-09-01), Traa
patent: 4928103 (1990-05-01), Lane
patent: 4940980 (1990-07-01), Tice
IEEE Journal of Solid-State Circuits, "An 8-Bit Video ADC Incorporating Folding and Interpolation Techniques", SC-22, No. 6, Dec. 1987, pp. 944-953.
Hoff Marc
SGS-Thomson Microelectronics S.A.
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