1988-03-31
1991-06-25
James, Andrew J.
357 232, H01L 2176, H01L 2972
Patent
active
050271679
ABSTRACT:
The semiconductor integrated circuit of the present invention includes an electrode to which potential is supplied to apply an electric field to an isolation layer between similar semiconductor layers having ohmic electrodes and implanted into a compound semiconductor substrate. By this construction this invention reduces the development of temporary conduction in the isolation layer due to disturbance of potential barrier by .alpha. particles, and can improve pronouncedly the tolerance to .alpha. particle induced soft errors.
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Umemoto et al., "Effects of a Buried p-Layer on Alpha-Particle Immunity of MESFET's Fabricated on Semi-Insulating GaAs Substrates", IEEE Electron Device Letters EDL-7, No. 6, Jun. 1986, pp. 396-97.
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Kagaya Osamu
Shigeta Junji
Umemoto Yasunari
James Andrew J.
Nguyen Viet Q.
The Agency of Industrial Science and Technology
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