Flip-flop circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307215, 307303, 357 92, H03K 3286

Patent

active

041561546

ABSTRACT:
A flip-flop circuit includes first, second, third and fourth NAND gates each with first and second output terminals. The first output terminal of the first NAND gate C and the first output terminal of the third NAND gate are connected to the input terminals of the second and fourth NAND gates, respectively. The first output terminals of the second and fourth NAND gates are connected to the input terminals of the first and third NAND gates, respectively. The second output terminals of the first and second NAND gates are connected to the input terminals of the third and fourth NAND gates, respectively. The second output terminal of the fourth NAND gate is coupled with the input terminal of the first NAND gate. A first diode is inserted between the input terminals of the first and second NAND gates and second diode is inserted between the third and fourth NAND gates. An input signal is applied to the input terminal of the second NAND gate, and an output signal is taken from the second output terminal of the third NAND gate.

REFERENCES:
patent: 3603815 (1971-09-01), Rao
patent: 3930266 (1975-12-01), Okamoto

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