Filtered serial event controlled command port for memory

Details Filtered serial event controlled command port for memory Filtered serial event controlled command port for memory

1995-02-10

1997-10-28

Swann, Tod R.

Boots, shoes, and leggings

36496576, 36496579, G11C 1606

Patent

active

056824963

ABSTRACT:
A filtered command port architecture for a memory array is disclosed. A command controller is directly connected to the memory array and receives command instructions from an external microprocessor via an address and data bus. A command clock is used to latch commands from the data bus into a command decoder. A timing signal is used to filter incoming signals from the data bus which are asserted for less than a predetermined amount of time. A state decoder then tracks a sequence of commands from the command decoder and performs an appropriate action in response to the commands.

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