Receive packet pre-parsing by a DMA controller

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Details

395733, 395868, G06F 1332

Patent

active

058093346

ABSTRACT:
A processor-based control system including a host processor, a data receiver device, a system memory, and an intelligent DMA controller. The DMA controller includes a pre-parsing section. The pre-parsing section interrogating a received data packet to determine whether the received data packet contains an error, is valid, is a null packet or whether the host processor must be contacted.

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