Programmable read-only memory (PROM) device having reduced progr

Details Programmable read-only memory (PROM) device having reduced progr Programmable read-only memory (PROM) device having reduced progr

1984-11-26

1987-03-10

Moffitt, James W.

Static information storage and retrieval

Floating gate

Particular biasing

365194, 365230, G11C 700, G11C 1140

Patent

active

046495215

ABSTRACT:
A programmable read-only memory device comprising a memory cell transistor which has a floating gate and a control gate formed above the floating gate. The programmable read-only memory device further comprises a means for delaying the application timing of a high voltage to the control gate from that of a high voltage to the drain of the memory cell transistor when a data programming operation is performed by applying the high voltage to the control gate and the drain of the memory cell transistor, thereby ensuring reliable a data write operation even at a low programming voltage.

REFERENCES:
patent: 3886532 (1975-05-01), Wegener et al.
patent: 4340943 (1982-07-01), Asano et al.
patent: 4374430 (1983-02-01), Higuchi
patent: 4392212 (1983-07-01), Miyasaka et al.
patent: 4531202 (1985-07-01), Watanabe et al.
Stewart et al., "A Yons CMOS E.sup.2 PROM", IEEE ISSCC Dig. of Tech. Papers, 2-11-82, pp. 110-111, 303.

Affiliated with

Also associated with

Rating

Programmable read-only memory (PROM) device having reduced progr does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Programmable read-only memory (PROM) device having reduced progr, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Programmable read-only memory (PROM) device having reduced progr will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1025735