Graphic processing system having bus connection control capable

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G06F 1562

Patent

active

050460234

ABSTRACT:
A graphic processing system including a main memory for storing a program and information corresponding to pixels, a main processor for effecting an execution processing of a program transferred from the main memory or from an external device so as to control the system, display/output devices such as a CRT device and a printer for outputting graphic information attained by controlling pixels arranged in a plurality of dimensions, a frame buffer for storing information corresponding to pixels outputted to the display/output devices, and a graphic processor for receiving a command and parameter information transferred from the main memory and/or the main processor, for generating character and graphic data in accordance with a predetermined processing procedure and for performing a transfer control including an execution of a drawing processing to transfer generated data through first and second address buses and first and second data buses to the main memory and/or the frame buffer, respectively. The system also includes bus connection switch circuit to be controlled by the graphic processor to effect a connection control between the first and second address buses and between the first and second data buses so as to enable execution of a drawing processing in the main memory connected to a bus on the main processor side and a data transfer between the main memory and the frame buffer.

REFERENCES:
patent: 4475161 (1984-10-01), Stock
patent: 4528636 (1985-07-01), Robinson, III
patent: 4533910 (1985-08-01), Sukonick et al.
patent: 4542376 (1985-09-01), Bass et al.
patent: 4564915 (1986-01-01), Evans et al.
patent: 4677573 (1987-06-01), Brown et al.
patent: 4773026 (1988-09-01), Takahara et al.

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