Static information storage and retrieval – Floating gate – Particular biasing
Patent
1990-04-16
1991-08-20
Clawson, Jr., Joseph E.
Static information storage and retrieval
Floating gate
Particular biasing
357 235, 357 41, G11C 1140
Patent
active
050420089
ABSTRACT:
A non-volatile memory device is fabricated on a semiconductor substrate structure and comprises a word line formed by a buried layer in the semiconductor substrate structure and a plurality of memory cells associated with the word line, and each of the memory cells comprises a control gate region of formed in the semiconductor substrate structure and extending from the word line to a major surface portion of the semiconductor substrate structure, a first gate insulating film covering a top surface of the control gate region, a source region of formed in the major surface portion of the semiconductor substrate structure, a drain region formed in the major surface portion of the semiconductor substrate structure and spaced from the control gate region and the source region, a second gate insulating film provided over that area between the source and drain regions, and a floating gate electrode extending from the first gate insulating film to the second gate insulating film, since the word line extends below the major surface, the word line does not consume a real estate of the semiconductor substrate structure and, accordingly, enhances the integration density of the non-volatile memory device.
REFERENCES:
patent: 4542396 (1985-09-01), Schutten et al.
patent: 4858185 (1989-08-01), Kawshik et al.
Iwasa Shoichi
Ohki Masaru
Clawson Jr. Joseph E.
NEC Corporation
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