Method of forming buried contact between polysilicon gate and di

Details Method of forming buried contact between polysilicon gate and di Method of forming buried contact between polysilicon gate and di

1990-10-03

1991-11-12

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 46, 437 52, 437 57, 437162, 437191, 437158, 148DIG31, 148DIG123, H01L 2122

Patent

active

050647768

ABSTRACT:
A buried contact between the gate of a transistor device formed at the surface of a semiconductor substrate and a diffusion region formed in the surface of the substrate remote from the transistor device. The buried contact includes a polysilicon interconnect structure formed after shaping of the gate layer and the gate insulator. The polysilicon interconnect structure engages a side edge and an adjoining lower surface of the gate layer at a location where the gate insulator has been removed by isotropic etching from between the gate layer and the surface of the substrate. The polysilicon interconnect layer also contacts the surface of the substrate beneath an overhanging edge of the gate layer so as to form a surface current pathway interface. Below the surface current pathway interface a migration region is formed by heat-induced movement of ions from the gate layer through the polysilicon interconnect structure. The migration region extends laterally away from the gate layer to make contact with a remote diffusion region, thereby effecting with the polysilicon interconnect structure the desired buried contact.

REFERENCES:
patent: 4413402 (1983-11-01), Erb
patent: 4778775 (1988-10-01), Tzeng
patent: 4797373 (1989-01-01), Malhi et al.
patent: 4830972 (1989-05-01), Hamasaki
patent: 4837179 (1989-06-01), Foster et al.
patent: 4877483 (1989-10-01), Behgemont et al.
patent: 4939104 (1990-07-01), Pollack et al.

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