Emitter-follower circuit with reduced delay time

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307443, 307475, H03K 19086, H03K 19092, H03K 19013

Patent

active

050417436

ABSTRACT:
The emitter-follower circuit of the invention, having a current-switching type logic circuit operating between the ground potential and the first negative power supply potential, comprises an emitter-follower transistor having its emitter connected to an output terminal; a first transistor having its collector connected to the ground potential; a second transistor having its base connected to the emitter of the first transistor and its emitter connected to the second negative power supply potential; and a diode connected between the base of the first transistor and the output terminal. The emitter-follower circuit may further comprises an input emitter-follower circuit stage and a differential circuit which make the speed of turn-off operation of the second transistor high. The second transistor receives at its base a signal whose phase is inverted with respect to the phase of the signal received by the emitter-follower transistor from the current-switching type logic circuit. In the transition of the output signal changing from its High to Low level, the second transistor serves to provide a current-path for discharging the charge which was charged in a capacitance of the load, whereby the delay time is shortened without a noise margin being decreased.

REFERENCES:
patent: 3602735 (1971-08-01), Lodi
patent: 4321490 (1982-03-01), Bechdolt
patent: 4498022 (1985-02-01), Koyama et al.
patent: 4855622 (1989-08-01), Johnson
patent: 4877977 (1989-10-01), Kokado
patent: 4896058 (1990-01-01), Murray
patent: 4912344 (1990-03-01), Yin
patent: 4972104 (1990-11-01), Estrada

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