Fishing – trapping – and vermin destroying
Patent
1991-12-13
1993-10-05
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437183, 437184, 437203, 437204, 437216, H01L 2160
Patent
active
052504697
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
The present invention relates to an IC mounting circuit substrate for connecting and mounting an IC chip with and on a circuit substrate and, more particularly, to an IC mounting circuit substrate and an IC mounting process for the circuit substrate, which are optimum if applied to a method of connecting bumps formed on a circuit substrate and pads of an IC chip electrically while being heated and melted by an irradiation energy emitted from an irradiation beam such as a laser beam or an infrared ray.
BACKGROUND ART
The well-known process for mounting an IC chip on a circuit substrate by using junctioning bumps is exemplified not only by the tab method of effecting the connections by the thermal fusion or ultrasonic bonding by using either the bumps formed on the IC chip at the side of the bonding pads or the bumps formed at the lead fingers at the side of a chip carrier tape but also by the flip-chip method of soldering the bumps formed at the side of the IC chip and the conductor pattern of the circuit substrate.
This process for mounting the IC chip on the circuit substrate is troubled by a high cost because the tab method requires a number of steps for the means for forming the bumps at the side of the IC chip. Thus, it is a tendency to adopt the method of transferring the bumps to the leading ends of the lead fingers. This method requires not only a special jig for forming the bumps but also a transfer bonding step and is limited in its high integration. Moreover, these two methods are suffered from a mechanical weakness because the lead fingers are not supported. Since, moreover, there is no insulator between those lead fingers, it is impossible to stagger the bonding pads. Still moreover, the lead fingers are liable to be deformed by their projecting structure, and it is difficult to hold the positional precision in the X, Y and Z directions.
Since, on the other hand, the bumps are likewise formed at the side of the IC chip in case of the flip chip method, a number of steps are required to raise the cost. This cost rise is also invited by forming a dam for preventing the solder from flowing to the peripheries of the pads of the circuit substrate. At the same time, a high integration is limited.
Therefore, the structure of the IC mounting circuit substrate, in which a predetermined circuit conductor pattern is formed on one face of an insulating film and in which IC pad junctioning bumps are made of solder such that they are electrically junctioned to the desired portions of the circuit conductor pattern and project to the outside of the circuit substrate through the aforementioned insulating layer, is highly practical as the means for solving the aforementioned several problems of the prior art. In order to mount the IC chip on that IC mounting circuit substrate, there is generally adopted a process for connecting and mounting the IC chip with and on the circuit substrate by melting solder bumps through a reflow furnace such that the pads of the IC chip are positioned over the bumps of the circuit substrate.
However, the method of connecting the IC chip by the reflow means of the solder bumps is troubled by the following problems: that the IC chip is damaged by the thermal impact at the time of passing the reflow furnace; and that the IC chip is also damaged due to the difference in thermal expansion between the circuit substrate and the IC chip.
DISCLOSURE OF THE INVENTION
In view of the background thus far described, the present invention contemplates to provide an IC mounting circuit substrate and an IC mounting process optimum for the former, which can mount an IC chip satisfactorily on the circuit substrate while being freed from affecting an IC chip adversely due to the thermal impacts or thermal stresses, when the IC chip is to be connected with and mounted on the IC mounting circuit substrate constructed to have IC pad junctioning bumps junctioned electrically to the predetermined portions of a predetermined circuit conductor pattern formed on one side of an insulating
REFERENCES:
patent: 4764804 (1988-08-01), Sahara
patent: 4957882 (1990-09-01), Shinomiya
patent: 4997791 (1991-03-01), Ohuchi et al.
patent: 5071787 (1991-12-01), Mori et al.
Oomachi Chikafumi
Tanaka Yasuyuki
Hearn Brian E.
Nippon Mektron Ltd.
Picardat Kevin M.
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