Fishing – trapping – and vermin destroying
Patent
1992-03-11
1993-10-05
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437195, 437922, 148DIG55, H01L 2114
Patent
active
052504646
ABSTRACT:
A method and resulting structure to provide an antifuse wherein the resistance of the programmed fuse and the line resistance and capacitance are materially reduced relative to the prior art and the procedures involved and the resulting structure of the fuse permit the use of materials not available in prior art antifuses. This is accomplished by providing the fuse on vertical sidewalls of the fuse electrode or beneath a sidewall oxide on the fuse electrode. Since the thickness of the electrode can be controlled to an extent not currently achievable by lithographic means, a much smaller area antifuse is provided using sidewall antifuse as opposed to a planar antifuse. The method of forming the antifuse structure comprises the steps of forming a pedestal having a sidewall comprising a first layer of electrically conductive material and a first electrically insulating layer thereon, forming a conformal layer of electrically conductive material on the pedestal and exposed substrate extending along the sidewall, forming a sidewall insulating layer along the sidewall portion of the layer of electrically conductive material, removing all of the exposed portion of the layer of electrically conductive material while retaining the portion of the layer of electrically conductive material between the pedestal and the sidewall insulating layer, forming a second layer of electrically insulating material over the structure, and forming a second layer of electrically conductive material over the second layer of electrically insulating material.
REFERENCES:
patent: 4966867 (1990-10-01), Crotti et al.
patent: 5089432 (1992-02-01), Yoo
patent: 5100827 (1992-03-01), Lytle
patent: 5106773 (1992-04-01), Chen et al.
patent: 5110754 (1992-05-01), Lowrey et al.
patent: 5110766 (1992-05-01), Maeda et al.
patent: 5120679 (1992-06-01), Boardman et al.
Liu David K.
Wong Man
Donaldson Richard
Fleck Linda J.
Garner Jacqueline J.
Hearn Brian E.
Hiller William E.
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