Synchronous semiconductor memory device

Details Synchronous semiconductor memory device Synchronous semiconductor memory device

1999-11-09

2000-12-26

Phan, Trong

Static information storage and retrieval

Addressing

Sync/clocking

365194, 36523003, G11C 800

Patent

active

061669938

ABSTRACT:
A control signal generator, which decodes external control signals and generates internal control signals, is divided into a synchronous circuit and a timing adjustment circuit. The synchronous circuit includes latch circuits that respond to internal clock signals complementary to each other. It generates, in synchronization with the internal clock signals, state transition signals indicating operating modes. The timing adjustment circuit adjusts timings of the internal control signals with respect to rising or falling edges of these state transition signals. Thus, the design of the control signal generator is simple.

REFERENCES:
patent: 4841488 (1989-06-01), Sanada
patent: 5889728 (1999-03-01), Rezeanu
patent: 6009501 (1999-12-01), Manning
patent: 6031788 (2000-02-01), Bando et al.

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