Zero power reset circuit for low voltage CMOS circuits

Details Zero power reset circuit for low voltage CMOS circuits Zero power reset circuit for low voltage CMOS circuits

1997-12-30

2000-08-22

Cunningham, Terry D.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327198, H03L 700

Patent

active

061078476

ABSTRACT:
A pulse generating circuit that includes an unbalanced latch and a feedback circuit. The unbalanced latch is configured to generate a latch signal having a predetermined state in response to application of power to the circuit. The feedback circuit is coupled in a negative feedback arrangement with the unbalanced latch and generates a pulse signal for a predetermined period of time in response to the latch signal.

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