Zero power fuse circuit using subthreshold conduction

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Fusible link or intentional destruct circuit

Reexamination Certificate

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C327S143000, C327S198000

Reexamination Certificate

active

06191641

ABSTRACT:

BACKGROUND
1. Field of the Invention
This invention relates generally to fuse circuits, and in particular to laser fuse circuits dissipating zero static power.
2. Description of Related Art
Due to the ever-increasing number of applications and uses for integrated circuits, two major objectives for IC manufacturers are the ability to customize circuits for specific uses and the ability to manufacture these circuits at lowest cost. One method of customizing or configuring circuits is to utilize laser fuses to alter the structure, path, or electrical characteristics of the semiconductor device. This is of use in both moderately configurable devices such as full-custom ICs with laser enabled operating modes, or in highly configurable devices such as laser fuse-based gate arrays where the entire function of the device can be altered by lasering. Laser fuses are also used in various repair schemes which improve yields and thus reduce unit costs. In particular, fuses have been used to repair non-functional devices through the selective deletion of defective portions of the circuitry and the substitution of functional redundant circuitry for the defective portions of the circuitry, thus reclaiming failing ICs as good devices.
Laser fuses are typically made from either metal or polysilicon material. The fuses are disconnected (blown) by irradiating the selected fuse with a targeting energy beam, hereinafter generally referred to as a laser. To improve fuse blowing dynamics, it is also common for the fuse to be covered by an insulating layer of silicon oxide, silicon nitride, or other insulating materials, which are applied as inter-conductive dielectric layers, and/or as part of a final passivation layer to protect the device from moisture and scratches.
The fuse disconnection occurs when the fuse body is heated by the laser, resulting in a change in the fuse material from a solid state to a vaporized or partially vaporized state. The insulation layer covering the fuse serves as a bomb vessel enclosure which momentarily contains the fuse material and prevents premature splattering or melting; the containment of the fuse material results in a more complete and uniform vaporization of the fuse material. The resulting pressure from the vaporization of the fuse causes the overlying insulation to be “blown open” or rupture, blowing the fuse material out of the cavity and thereby completing the desired disconnection. However, in some situations, the fuse is poorly blown.
FIGS. 1A and 1B
illustrate the case of an incompletely or poorly blown fuse.
FIG. 1A
shows a top view of a laser-configured fuse
100
formed on and covered with a layer of insulating material, such as a silicon oxide
110
. Fuse
100
includes a fuse body
120
and two fuse terminals
130
, which are connected to underlying circuit elements. Fuse body
120
is blown to sever the connection between the underlying elements, creating a disconnection hole
140
in the oxide
110
.
FIG. 1B
is cross-sectional view of
FIG. 1A
along sectional lines A-A′.
FIG. 1B
shows a situation where the fuse blowing process results in an underblown fuse. Because the fuse body is not completely blown, a portion
150
of the fuse body may remain in the corner or other areas of the disconnect hole
140
. If the portion
150
extends to both fuse terminals, an electrical connection between the fuse terminals still exists. A quick fuse clean-up etch is often employed to remove any residual fuse debris, such as portion
150
, from the blown fuse cavity; unblown fuses are not attacked by this etch since they are still covered by the enclosing insulation layer.
Using techniques such as these, it is possible to implement highly manufacturable laser fuse processes, and indeed laser fuse circuits have found wide use in the semiconductor industry in products ranging from DRAMs to microprocessors.
While laser fuses provide useful methods to reducing cost and to customizing circuits quickly and flexibly, the laser fuses themselves are expensive circuit elements to deploy due to their relatively large size. The design rules used to lay out and place laser fuses are typically derived from the diameter of the laser beam that will be used to program the fuses. Given a large laser beam diameter, laser fuse layout dimensions must also be made large. In particular, nearby unrelated circuit elements must be spaced a safe distance away to avoid damage to these elements during lasering. Current laser systems provide beams with lateral dimensions that are approximately 5×—10× the dimensions achieved by current wafer photomasking equipment (the equipment used to pattern transistor elements). Consequently, laser fuse elements occupy correspondingly larger layout area and are significantly more costly than transistors, and the total area of a laser configuration circuit layout is predominantly a function of the number of laser fuses used in the circuit. Accordingly, in designing cost-effective circuits based on laser fuses, it is desirable to minimize the number of laser fuses required to implement a given function.
Furthermore, since fuse-based circuits are often replicated many times across an IC design, it is desirable that these fuse circuits dissipate minimum active power. Large ICs often have constrained maximum power budgets due to the limited heat dissipation capability of their packages, and any power dissipated by fuse-based circuits subtracts directly from the amount of other circuitry that can be placed in the IC.
Thus, it is desirable for laser fuse circuit schemes to utilize the minimum number of laser fuses possible (for cost reasons) and for the circuits to consume minimum static power (for power management reasons).
Zero static power fuse circuits (i.e., fuse circuits that operate with essentially no static power dissipation in both the blown and not-blown state) are known, such as disclosed in U.S. Pat. No. 4,613,959, entitled “Zero Power CMOS Redundancy Circuit” to Jiang and in U.S. Pat. No. 5,731,734, entitled “Zero Power Fuse Circuit” to Pathak et al. Note that “zero power” is an approximate term, as these circuits do dissipate tiny amounts of power through reverse-biased PN junction leakages and/or through transistor subthreshold conduction leakages, but these currents are considered negligible since they are so much smaller than normal operating currents. Jiang discloses a zero static power circuit that is created from two laser fuses and two transistors, while Pathak et al. disclose a zero static power circuit that is created from one laser fuse, three transistors, and a capacitor. Because laser fuses and capacitors occupy the majority of the area of a fuse circuit, it is desirable to have a zero static power laser fuse circuit with fewer laser fuses and capacitors than is the case with prior art laser fuse circuits.
SUMMARY
In accordance with the present invention, a zero static power fuse circuit utilizes one fuse and three transistors, thereby achieving reduced area as compared with conventional fuse circuits.
The fuse circuit includes a reverse-biased diode/fuse circuit comprising a fuse connected in series with a reverse-biased diode, and a driving circuit capable of driving an output node. The reverse-biased diode is implemented as a MOS transistor with the gate of the MOS transistor connected to its source such that the transistor is shut off and only conducts a small amount of subthreshold current. Configured this way, the transistor may be considered a two terminal device with the properties of a reverse-biased diode. One terminal of the reverse-biased diode is connected to one terminal of the fuse at a common node. This common node forms the input to the driver circuit. The non-common terminal of the fuse is connected to a first potential; the non-common terminal of the MOS transistor diode is connected to a second potential. The driving circuit, in one embodiment, is a CMOS inverter formed from one NMOS transistor and one PMOS transistor in series.
When the fuse in the diode/fuse circuit is blown, the small su

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