Zero power fuse circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Fusible link or intentional destruct circuit

Patent

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Details

327526, 327143, H03K 17687

Patent

active

057317348

ABSTRACT:
A zero power fuse circuit includes a latch means having two inputs, a first input being latched to ground and a second input being latched to V.sub.cc. The latch means is triggered either by a momentary contact of the first input to ground or by the momentary contact of the second input to V.sub.cc. A first embodiment includes two fuse element/capacitor pairs each coupled to one of the two inputs of the latch means. A second embodiment includes a pull-up transistor and a fuse element/capacitor pair, coupled to the first and second inputs respectively. A third embodiment includes a pull-down transistor and a fuse element/capacitor pair respectively coupled to the second and first inputs of the latch means.

REFERENCES:
patent: 4613959 (1986-09-01), Jiang
patent: 4818904 (1989-04-01), Kobayashi
patent: 4837520 (1989-06-01), Golke et al.
patent: 5051691 (1991-09-01), Wang
patent: 5151614 (1992-09-01), Yamazaki et al.
patent: 5315177 (1994-05-01), Zagar et al.
patent: 5440246 (1995-08-01), Murray et al.
patent: 5457656 (1995-10-01), Fu

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