Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1992-08-13
1994-01-04
Westin, Edward P.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
36523006, 307455, H03K 19082, G11C 800
Patent
active
052763633
ABSTRACT:
A zero power decoder/driver circuit for high performance array chips dissipates zero power when in the deselected state. The decoder/driver circuit is a complementary bipolar circuit comprising a first bipolar transistor of a first conductivity type having its base connected to a down level decoded output of a first level decoder and its emitter connected to an up level decoded output of said first level decoder. The decoder/driver circuit is selected by a predetermined voltage differential across the base/emitter circuit of the first transistor. A diode-connected second bipolar transistor of a second conductivity type is connected to the collector of said first bipolar transistor. A line driver third bipolar transistor of the second conductivity type is connected to a load resistor and mirrors current flowing in said second bipolar transistor. When the second state decoder is deselected, no current flows in the second bipolar transistor of second conductivity type and, therefore, no current is mirrored into the third bipolar transistor of second conductivity type, thus resulting in zero power dissipation. Since only one word line and one bit column are selected at a time, total power dissipation can be substantially reduced.
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"Three Level Decoding Scheme for High Density Arrays," IBM Technical Disclosure Bulletin, vol. 29, No. 7, Dec. 1986.
Klara Walter S.
Montegari Frank A.
International Business Machines - Corporation
Sanders Andrew
Westin Edward P.
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