Zero phase restart interpolated timing recovery in a sampled amp

Details Zero phase restart interpolated timing recovery in a sampled amp Zero phase restart interpolated timing recovery in a sampled amp

1996-11-18

1998-11-10

Psitos, Aristotelis M.

Dynamic magnetic information storage or retrieval

General processing of a digital signal

Data clocking

375341, G11B 509

Patent

active

058352953

ABSTRACT:
A sampled amplitude read channel is disclosed for disc storage systems which asynchronously samples an analog read signal, equalizes the resulting discrete time sample values according to a target partial response, extracts synchronous sample values through interpolated timing recovery, and detects digital data from the synchronous sample values using a Viterbi sequence detector. The interpolated timing recovery comprises a zero phase restart circuit for minimizing an intial phase error between expected sample values and interpolated sample values at the beginning of an acquisition mode by computing an initial sampling phase offset.

REFERENCES:
patent: 5481568 (1996-01-01), Yada
patent: 5552942 (1996-09-01), Ziperovich et al.
patent: 5563746 (1996-10-01), Bliss
patent: 5696639 (1997-12-01), Spurbeck et al.
patent: 5726818 (1998-03-01), Reed et al.
"Interpolation in Digital Modems--Part II: Implementation and Performance", IEEE, Erup et al, 1993.
Sonntag, Agazzi, Aziz, Burger, Comino, Heimann, Karanink, Khoury, Madine, Nagaraj, Offord, Peruzzi, Plany, Rao, Sayiner, Setty, Threadgill, "A High Speed, Low Power PRML Read Channel Device", IEEE Transactions on Magnetics, vol. 31, No. 2, Mar. 1995.

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