Zero insertion force socket for surface-mounted integrated circu

Electrical connectors – With coupling movement-actuating means or retaining means in... – For dual inline package

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H01R 1362

Patent

active

048405760

ABSTRACT:
A zero insertion force socket for integrated circuits having a contact pattern formed on the upper surface of a resilient circuit on which an integrated circuit is adapted to be placed with its leads in contact with the contact pattern. A plurality of frames having different sized cutouts conforming to the shape of integrated circuit cases of different sizes are used to position integrated circuits having cases of different sizes at predetermined locations on the contact pattern. The positioning frames are pivotally mounted on a common pin, and they nest together so that at least some of the positioning frames fit within the rectangular cutout of the next larger positioning frame. In order to bias the integrated circuit into the resilient circuit, a lid having a plunger is positioned over the integrated circuit. The plunder contacts the upper surface of the integrated circuit case to force it against the resilient circuit either with a constant force or a constant displacement. The plunger may project through the lid when it is displaced by an integrated circuit in order to indicate that an integrated circuit is installed in said socket.

REFERENCES:
patent: H13 (1986-01-01), Vratny
patent: 4116517 (1978-09-01), Selvin et al.
patent: 4554505 (1985-11-01), Zachry
patent: 4571015 (1986-02-01), Mueller
patent: 4593961 (1986-06-01), Cosmo
patent: 4688870 (1987-08-01), Egawa et al.
patent: 4717346 (1988-01-01), Yoshizaki
"P.L.C.C", Yamaichi Electronics, IC51 Series (1 sheet).
"New User Friendly Chip Carrier Sockets for Test and Burn In," Textool 3M, (3 pages).

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