Zero-IF receiver

Pulse or digital communications – Receivers – Automatic baseline or threshold adjustment

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Details

375316, 375324, 375325, 375345, 375349, 329318, 329319, 329304, 329306, 329307, 455303, 455304, 455306, 455310, H04L 2506, H04L 2510, H04B 110

Patent

active

060091266

ABSTRACT:
Known is a zero intermediate frequency receiver or zero-IF receiver in which DC-offset correction is done in the I- and Q-paths, after mixing down of the received RF-signal or of an IF-signal. Such a DC-offset correction is not sufficient for high gain I- and Q-paths, particularly not in pagers for receiving long messages. Furthermore, no optimal power saving is achieved if such a receiver alternately operates in receive mode and sleep mode. A zero intermediate frequency receiver is proposed in which DC-offset correction is distributed over the high gain I- and Q-path. Preferably, blocking means are provided between DC-offset correction circuits and low pass filters in the I- and Q-path to prevent that an output signal of an upstream DC-offset correction circuit in the path excites a downstream low pass filter in the path during DC-offset correction. Herewith, considerable power savings are achieved.

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"Active and Passive Analog Filter Design", Section 5.2, L.P. Huelsman, Mc Graw-Hill, Inc. 1993.
"The Art of Electronics", P. Horowitz et al, Cambridge University Press, pp. 416 and 420-423.

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