Zero drift analog memory cell, array and method of operation

Details Zero drift analog memory cell, array and method of operation Zero drift analog memory cell, array and method of operation

2006-02-21

2006-02-21

Elms, Richard (Department: 2824)

Static information storage and retrieval

Analog storage systems

C365S189030, C348S241000

Reexamination Certificate

active

07002821

ABSTRACT:
A zero-drift analog memory (ZDAM) cell that indefinitely maintains an output signal at a discrete voltage while the memory circuit is powered, wherein the memory circuit receives an input signal, passes the input signal to a storage element upon receiving an assertion signal, maintains an output signal at a level of the input signal when the assertion signal is removed, and utilizes a zero-drift transfer function feedback loop on the output signal to maintain the output signal. A memory array including a plurality of ZDAM cells and method of operation are also disclosed.

REFERENCES:
patent: 3363113 (1968-01-01), Bedingfield
patent: 4764752 (1988-08-01), Ormond
patent: 5007042 (1991-04-01), Santi
patent: 5479170 (1995-12-01), Cauwenberghs et al.
patent: 6018364 (2000-01-01), Mangelsdorf
patent: 6801445 (2004-10-01), Knodgen
Chris Diorio, Sunit Mahajan, Paul Hasler, Bradley Minch and Carver Mead; A High-Resolution Nonvolatile Analog Memory Cell; 1995; 4 pages; vol. 3; Pasadena, California.
Gert Cauwenberghs and Amnon Yariv; Fault-Tolerant Dynamic Multilevel Storage in Analog VLSI, Dec. 1994, 3 pages, vol. 4, No. 12.
Reid R. Harrison, Julian A. Bragg, Paul Hasler, Bradley A. Minch, and Stephen P. Deweerth; A CMOS Programmable Analog Memory-Cell Array Using Floating-Gate Circuits; Jan. 2001; 8 pages; vol. 48, No. 1.
RF and Communications Resources; Nonvolatile Memory Digital Potentiometers From Analog Devices Maintain Settings Following Power Loss; copy of web page (www.analog.com); Aug. 13, 2001; 1 page; Norwood, Massachusetts.
Gert Cauwenberghs; Adaptation, Learning and Storage in Analog VLSI, copy of web page (www.bach.ece.jhu.edu); Sep. 1996, 9 pages; Rochester, New York.

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