Zero-delay slew-rate controlled output buffer

Details Zero-delay slew-rate controlled output buffer Zero-delay slew-rate controlled output buffer

1997-11-19

1999-09-07

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

327379, 327112, 327108, 326 87, 326 26, H03B 100

Patent

active

059492597

ABSTRACT:
An output buffer in accordance with the present invention exhibits a fixed output signal slew rate. The output signal behavior is independent of the capacitive load seen by the buffer. The circuit includes a capacitive feedback path from the output node to circuitry which drives the output transistors. In one embodiment, the feedback path comprises two capacitive elements, one which comes into play during a rising edge transition and the other which affects a falling edge transition. In a second embodiment, a single capacitive element is coupled to a switching circuit for use during either a falling transition or a rising transition. The second embodiment provides precharging of the output transistor gates, and so improves response time.

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