Zero-crossing detection type clock recovery circuit operated at

Details Zero-crossing detection type clock recovery circuit operated at Zero-crossing detection type clock recovery circuit operated at

1999-07-28

2000-10-03

Pascal, Robert

Oscillators

Automatic frequency stabilization using a phase or frequency...

With reference oscillator or source

331 1A, 329304, H03D 300

Patent

active

061278971

ABSTRACT:
In a clock recovery circuit in a demodulator of a multi-level quadrature amplitude modulation (QAM) system, an analog/digital (A/D) converter performs an A/D conversion upon an analog baseband signal in synchronization with a sampling clock signal having a time period that is a symbol time period. A phase detector receives successive first and third data sampled from the A/D converter, calculates second data by addition of the first and third data, determines whether or not a signal transition formed by the first and third data crosses a zero value within a predetermined deviation, and compares a polarity of the second data with a polarity of one of the first and third data, and generates a comparison result as a phase detection signal when the signal transition crosses the zero value. A loop filter passes a low-frequency component of the phase detection signal therethrough. A voltage controlled oscillator supplies the sampling clock signal to the A/D converter in accordance with an output signal of the loop filter.

REFERENCES:
patent: 5042052 (1991-08-01), Roberts et al.
patent: 5608764 (1997-03-01), Sugita et al.
patent: 5789988 (1998-08-01), Sasaki

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