Z-interconnections with liquid crystal polymer dielectric films

Details Z-interconnections with liquid crystal polymer dielectric films Z-interconnections with liquid crystal polymer dielectric films

2003-03-18

2004-07-20

Lam, Cathy (Department: 1775)

Stock material or miscellaneous articles

Structurally defined web or sheet

Discontinuous or differential coating, impregnation or bond

C428S901000, C174S250000, C174S258000

Reexamination Certificate

active

06764748

ABSTRACT:

TECHNICAL FIELD
The present invention relates generally to multilayered laminates, and more particularly to multilayered laminates with dielectric layers that include liquid crystal polymer (LCP) dielectric material.
RELATED ART
Organic substrates comprising multilayer laminates have been and continue to be developed for many applications. However, it would be desirable to reduce costs and inefficiencies that currently characterize fabrication of multilayer laminates.
SUMMARY OF THE INVENTION
The present invention provides a multilayered stack, comprising:
a first dielectric layer that includes a first liquid crystal polymer (LCP) dielectric material, wherein a first electrical circuitization is on and in direct mechanical contact with a surface of the first dielectric layer; and
a second dielectric layer that includes a second LCP dielectric material, wherein a first electrically conductive plug includes a first electrically conductive material and extends through a thickness of the second dielectric layer, wherein a second electrical circuitization is on and in direct mechanical contact with a surface of the second dielectric layer, wherein the second electrical circuitization is in direct mechanical and electrical contact with a first end of the first electrically conductive plug, wherein the second dielectric layer is directly bonded to the first dielectric layer with no extrinsic adhesive-material bonding the second dielectric layer to the first dielectric layer, wherein the second dielectric layer is directly bonded to the first electrical circuitization with no extrinsic adhesive material bonding the second dielectric layer to the first electrical circuitization, and wherein the first electrically conductive plug is fluxlessly soldered to the first electrical circuitization.
The present invention provides method for forming a multilayered stack, comprising the steps of:
forming a first dielectric layer that includes a first liquid crystal polymer (LCP) dielectric material, wherein a first electrical circuitization is on and in direct mechanical contact with a surface of the first dielectric layer;
forming a second dielectric layer that includes a second LCP dielectric material, wherein a first electrically conductive plug includes a first electrically conductive material and extends through a thickness of the second dielectric layer, wherein a second electrical circuitization is on and in direct mechanical contact with a surface of the second dielectric layer, wherein the second electrical circuitization is in direct mechanical and electrical contact with a first end of the first electrically conductive plug;
fluxlessly soldering the first electrically conductive plug to the first electrical circuitization; and
subjecting the first dielectric layer, the second dielectric layer, and the first electrical circuitization to a temperature less than the lowest nematic-to-isotropic transition temperature of the first and second LCP dielectric materials, for a dwell time and at an elevated pressure that is sufficient to cause the first and second LCP dielectric materials to plastically deform and directly bond the second dielectric layer to the first dielectric layer and directly bond the second dielectric layer to the first electrical circuitization with no extrinsic adhesive material disposed between the second dielectric layer and the first dielectric layer and with no extrinsic adhesive material disposed between the second dielectric layer and the first electrical circuitization.
The present invention advantageously reduces processing time and processing costs in the fabrication of multilayer laminates.


REFERENCES:
patent: 5719534 (1998-02-01), Imura
patent: 5870274 (1999-02-01), Lucas
patent: 6124004 (2000-09-01), Furuta et al.
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patent: 6323436 (2001-11-01), Hedrick et al.
patent: 6326555 (2001-12-01), McCormack et al.
patent: 6334922 (2002-01-01), Tanaka et al.
patent: 6451710 (2002-09-01), Oka et al.
patent: 6528145 (2003-03-01), Berger et al.

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