Yield enhancement of complex chips

Details Yield enhancement of complex chips Yield enhancement of complex chips

2007-03-06

2007-03-06

Tung, Kee M. (Department: 2628)

Computer graphics processing and selective visual display system

Computer graphic processing system

Plural graphics processors

C345S506000, C345S557000

Reexamination Certificate

active

10086980

ABSTRACT:
A graphics processing chip which includes parallel texturing pipelines, with task allocation units which can bypass inoperative ones of said pipelines. Chips which have some but not all pipelines operative can still have full functionality, although performance is reduced.

REFERENCES:
patent: 5459864 (1995-10-01), Brent et al.
patent: 6025853 (2000-02-01), Baldwin
patent: 6529286 (2003-03-01), King
IBM Technical Disclosure Bulletin, “Row column bypass mechanism for an array of processing elements”, 4/81, vol. 23, pp. 5203-5206.

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