Pulse or digital communications – Equalizers – Automatic
Reexamination Certificate
1999-09-13
2001-05-15
Pham, Chi H. (Department: 2631)
Pulse or digital communications
Equalizers
Automatic
C333S02800T, C333S018000
Reexamination Certificate
active
06233276
ABSTRACT:
RELATED APPLICATIONS
NONE
TECHNICAL FIELD
The present invention is generally related to the field of digital communications across a transmission line. It is particularly suited to xDSL communications systems in which a time domain filter and/or a frequency domain equalizer is used to compensate for the channel corruption experienced by a transmitted signal.
BACKGROUND OF THE INVENTION
A communication channel linking a first transceiver to a second transceiver carries signals between the two. Regardless of which device transmits and which device receives, the channel typically corrupts a transmitted signal by altering the latter's amplitude and phase characteristics at frequencies across the channel's spectrum. As a result, the receiver receives a noisy version of the transmitted signal. If the nature of the corruption varies with time, the channel is considered to be a time-varying channel. If, on the other hand, the nature of the corruption does not change with time, or changes very slowly relative to the duration of a transmission, the channel is considered to be a time-invariant channel. For time-invariant channels, the corruption experienced by a transmitted signal can be predicted by estimating the channel's impulse response (CIR), which is a representation of the extent of spreading experienced by an impulse transmitted over that channel. One may estimate a time-invariant channel's CIR by transmitting a plurality of known training signals at known times, receiving the channel-corrupted training signals, and then calculating the CIR by techniques such as Least Mean Squares (LMS), among others. Once the CIR of a channel has been calculated, one may develop a channel equalizer to compensate for the corruption experienced by a transmitted signal.
FIG. 1
presents a block diagram of a typical Digital Subscriber Line (xDSL) modem, for HDSL, ADSL, SDSL, VDSL and similar communication. xDSL modems represent the next generation of high-speed digital communications for the Small-Office/Home-Office (SOHO) environment, as well as the burgeoning home user market which has been spurred on by the Internet. As seen in the diagram of
FIG. 1
, a typical xDSL modem
100
comprises a communication controller
102
to interface with a local network, computer or other equipment, a transceiver
04
and a line driver
106
which interfaces with a twisted-pair transmission line. It should be understood that xDSL modems may have other components and connections as well, and that the blocks shown may not always be present in a single unit.
FIG. 2
a
shows a block diagram of the modem's transceiver
104
. The transceiver
104
includes an analog front end
114
, a signal processor
112
and a digital interface
110
. The analog front end
114
typically includes a D.C. isolating transformer, filters and amplifiers to connect to the line driver
106
, and ADCs and DACs to interface the signal to and from the line driver to the signal processor
112
. The digital interface
110
includes circuitry to interface the processed signal output from the signal processor
112
to the communication controller
102
.
The signal processor
112
handles a number of functions. These functions may include such things as modulating and demodulating signals, echo cancellation, clipping mitigation, and filtering, among others. Thus, the signal processor
112
is used to convert the transmitted and received digital signals from one form to another. The signal processor
112
is typically implemented through a combination of hardware and executable software code. In the usual case, the signal processor includes a programmable computer, perhaps implemented as a reduced instruction set (RISC) computer, which handles only a handful of specific tasks. The computer is typically provided with at least one computer readable medium, such as a PROM, flash, or other non-volatile memory to store firmware and executable software code, and will usually also have an associated RAM or other volatile memory to provide workspace for data and additional software.
In the typical xDSL communication system, the signals handled by the signal processor
112
are discrete multitone signals (DMTs) comprising N/2 discrete tones simultaneously carried over the twisted pair. The collection of discrete tones is commonly referred to as a symbol, and a sequence of such symbols, spaced apart in time by a sacrificial prefix, are transmitted in xDSL communications. However, signal corruption by the twisted-pair may cause samples comprising one symbol to overlap with samples comprising adjacent symbols despite the presence of the sacrificial prefix. This phenomenon is called inter-symbol interference (ISI). In addition to ISI, another effect of channel corruption is that different DMT tones are attenuated and delayed to different degrees by the twisted pair channel and so may be unwieldy to process later on.
FIG. 2
b
illustrates some of the functions served by the signal processor
112
when receiving an xDSL signal during normal operation. Once the incoming DMT signal has been sampled by an analog-to-digital converter, the sampled signal is passed through a time domain filter
112
a
(TDF) to help mitigate ISI. The filtered sampled signal is then buffered in a serial-to-parallel converter
112
b
where the prefix is stripped and the DMT symbol is formatted and subjected to an N-length DFT, normally implemented as an FFT
112
c
, to convert the signal into N/2 complex discrete frequency coefficients. The complex signal is then subjected to a frequency domain equalizer
112
d
(FEQ) which accounts for the uneven attenuation and phase delay of the DMT symbol across the various frequencies. After passing through the FEQ
112
d
, the individual frequency bins may then be subject to decoding to extract the quadrature amplitude modulation (QAM) encoded signals. A more detailed description of xDSL communication, xDSL transceivers and equalizers can be found in U.S. Pat. No. 5,285,474 and U.S. Pat. No. 5,479,447, both to Chow et al., whose contents are incorporated by reference to the extent necessary to understand the present invention.
Before normal operations can begin, however, one must first establish the tap coefficients for the TDF
112
a
and correction factors for the FEQ
112
d
. The TDF is normally implemented in executable software code and stored as tap coefficients in a memory associated with the signal processor
112
. The same holds for the correction factors of the FEQ. Typically, both of these are established at the time a communication link is set up between an xDSL modem and another communications device via a twisted pair. When a communication link for a static channel is first established, the channel distortion characteristics are determined by transmitting known training signals over the twisted pair, receiving the channel-corrupted signals at the receiver, and employing LMS or some other algorithmic technique to estimate the impulse response of the channel. From these, one may then calculate the taps of the TDF
112
a
and the correction factors of the FEQ
112
d
. Ideally, the TDF and FEQ will not only remove ISI, but also account for any attenuation and phase distortion caused by the channel, across all frequencies.
In addition to simply calculating the various tap coefficients and correction factors during training, one must also determine the DMT symbol boundaries. DMT demodulation is predicated on the independence of DMT symbols. The DMT symbols must be independent because the DFT performs circular, rather than linear, convolution. Consequently, receivers must be designed to encapsulate a single and complete DMT symbol for DFT processing. This requires the receivers to be in synchronization with the transmitter's symbol boundary. A more detailed description of synchronization of receivers to transmitters for DMT modulation in xDSL communication can be found in U.S. Pat. No. 5,901,180 to Aslanis et al, and also in T. Pollet et al, “Synchronization With DMT Modulation”, IEEE Communications Magazine,
Burd Kevin M
Pennie & Edmonds LLP
Pham Chi H.
Virata Corporation
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