ΔΣ-type A/D converter

Coded data generation or conversion – Analog to or from digital conversion – Increasing converter resolution

Reexamination Certificate

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Details

C341S143000

Reexamination Certificate

active

07847714

ABSTRACT:
There is provided a technique for reducing the adverse effect of idle tones in the channels in a ΔΣ-type A/D converter including a plurality of channels for converting analog input signals into digital signals. The ΔΣ-type A/D converter includes an L channel for converting a left analog input signal into a digital signal and an R channel for converting a right analog input signal into a digital signal. Each of the L channel and the R channel includes a DC dither circuit for generating a DC addition voltage for shifting the frequency of an idle tone. In the L channel and the R channel, DC addition voltages generated by DC dither circuits are different from each other.

REFERENCES:
patent: 5073777 (1991-12-01), Fukuhara et al.
patent: 5225835 (1993-07-01), Majima et al.
patent: 5627535 (1997-05-01), Ichimura et al.
patent: 5835038 (1998-11-01), Nakao et al.
patent: 06061863 (1994-03-01), None
patent: 6-120837 (1994-04-01), None
patent: 2003-163596 (2003-06-01), None
Schreier, Richard et al., “Understanding Delta-Sigma Data Converters,” IEEE Press, 2005, pp. 41-49 with English Translation.

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