ΔΣ modulation circuit and system

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

Reexamination Certificate

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Details

C341S155000

Reexamination Certificate

active

08049651

ABSTRACT:
A ΔΣ modulation circuit that includes a first integrator and second integrator coupled in series, a quantizer coupled to an output of the second integrator, a delay device disposed in a feedback path from an output of the quantizer to an input of the first and second integrators, an adder which generates a difference between an output and an input of the quantizer, and a feedback circuit including a delay device which couples an output of the adder to an output of one of the first and second integrators.

REFERENCES:
patent: 5870048 (1999-02-01), Kuo et al.
patent: 7061415 (2006-06-01), Magrath
patent: 2002/0196169 (2002-12-01), Okuda et al.
patent: 2003/0196169 (2003-10-01), Wittkotter et al.
patent: 07-015281 (1995-03-01), None
patent: 2002-368620 (2002-12-01), None
patent: 2004-080430 (2004-03-01), None
patent: 2006-101531 (2006-04-01), None

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