Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks
Reexamination Certificate
2005-03-08
2005-03-08
Williams, Alexander Oscar (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Alignment marks
C257S773000, C257S730000, C430S022000, C430S321000, C430S323000, C356S401000, C356S247000, C204S297050, C204S22400M, C204S279000
Reexamination Certificate
active
06864589
ABSTRACT:
A two dimensional vernier is provided along with a method of fabrication. The two dimensional vernier has a reference array patterned into a substrate, or a material overlying the substrate. An active array is patterned into photoresist overlying the substrate or the material. Both the reference array and the active array each comprise a two dimensional array of shapes. A difference between a combination of size or spacing of the shapes in each array determines vernier resolution. Vernier range is determined by a combination of vernier resolution and an integer related to a total number of shapes along a given axis. The two dimensional vernier allows an operator to readily measure the misalignment of a pattern to be processed relative to a previous pattern in two dimensions using a microscope. The two dimensional vernier reduces, or eliminates, repositioning of the microscope to determine both x-axis misalignment and y-axis misalignment. If a significant misalignment is detected the photoresist can be stripped and the lithography step repeated prior to subsequent processing, and possible yield reduction.
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Curtin Joseph P.
Rabdau Matthew D.
Ripma David C.
Sharp Laboratories of America Inc.
Williams Alexander Oscar
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