X-ray detecting device and fabricating method thereof

Radiant energy – Invisible radiant energy responsive electric signalling – Semiconductor system

Reexamination Certificate

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Details

C250S370080

Reexamination Certificate

active

06617584

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to an X-ray detector, and more particularly to an X-ray detecting device and a fabricating method thereof that is capable of preventing a contact badness among a drain electrode, a ground electrode and a transparent electrode.
2. Description of the Related Art
Generally, an X-ray imaging system photographing an object using a non-visible light ray such as an X-ray, etc. has been used for medical, science and industry applications. This X-ray imaging system includes an X-ray detecting panel for detecting an X-ray passing through an object to convert it into an electrical signal.
As shown in
FIG. 1
, the X-ray detecting panel includes a photo sensitive layer
6
for detecting an X-ray, and a thin film transistor substrate for switching and outputting the detected X-ray from the photo-sensitive layer
4
. The thin film transistor substrate includes pixel electrodes
34
arranged in a pixel unit, and thin film transistors (TFT's), each of which is connected to a charging capacitor Cst, a gate line
2
and a data line (not shown) On the upper portion of the photo sensitive layer
4
is provided a dielectric layer
6
and an upper electrode
8
which is connected to a high voltage generator
10
. The photo sensitive layer
4
made from a selenium with a thickness of hundreds of &mgr;m detects an incident X-ray to convert it into an electrical signal. In other words, the photo sensitive layer
4
produces an electron-hole pair when an X-ray is incident thereto, and separates the electron-hole pair when a high voltage of several kV is applied from the high voltage generator
10
to the upper electrode
8
. The pixel electrode
34
plays a role to charge holes produced by X-ray detection from the photo sensitive layer
6
into the charging capacitor Cst. The thin film transistor (TFT) responds a gate signal inputted over the gate line
2
to apply a voltage charged in the charging capacitor Cst to the data line. Pixel signals supplied to the data line is applied, via a data reproducer, to a display device, thereby displaying a picture.
Referring to FIG.
2
and
FIG. 3
, in the thin film transistor substrate, the pixel electrode
34
is formed at a unit pixel area defined by the gate line
2
and a data line
42
. The charging capacitor Cst is formed by the pixel electrode
34
and a transparent electrode
30
positioned at the lower portion of the pixel electrode
34
with having a storage insulation layer
32
therebetween. A ground electrode
20
is formed in a direction crossing the pixel electrode
34
to reset the residual electric charges of the charging capacitor Cst. The ground electrode
34
is electrically coupled, via a ground contact hole
26
b
, to the transparent electrode
30
.
The thin film transistor (TFT) is formed at an intersection between the data line
42
and the gate line
3
. The TFT consists of a gate electrode
36
extended from the gate line
2
, a source electrode
38
extended from the data line
42
, a drain electrode
40
connected, via drain contact holes
24
a
,
26
a
and
28
a
, to the pixel electrode
34
, and semiconductor layers
14
and
16
for defining a conductive channel between the source electrode
38
and the drain electrode
40
.
FIG. 4A
to
FIG. 4
h
shows a method of fabricating the X-ray detecting device shown in
FIG. 2
step by step.
Referring first to
FIG. 4A
, the gate electrode
36
and the gate line
2
are provided on the substrate
1
.
The gate electrode
36
and the gate line
2
are formed by depositing a metal material using a deposition technique such as a sputtering, etc. to form a conductive layer and then patterning the conductive layer. The gate electrode
36
and the gate line
2
are formed from a metal material such as an aluminum ally, and are preferably formed from aluminum-neodymium/molybdenum (AlNd/Mo).
Referring to
FIG. 4B
, an active layer
14
and an ohmic contact layer
16
are provided on a gate insulating film
12
.
The gate insulating film
12
is formed by entirely depositing an insulating material, such as silicon nitride (SiN
x
) or silicon oxide (SiO
x
), onto the substrate
1
by the plasma enhanced chemical vapor deposition (PECVD) technique in such a manner to cover the gate line
2
and the gate electrode
36
.
The active layer
14
and the ohmic contact layer
16
are formed by sequentially disposing first and second semiconductor material layers
14
and
16
on the gate insulating film
12
and then patterning them. The active layer
14
is formed from a first semiconductor material, that is, amorphous silicon that is not doped with an impurity. On the other hand, the ohmic contact layer
16
is formed from a second semiconductor material, that is, amorphous silicon doped with an n-type or p-type impurity at a high concentration.
Referring to
FIG. 4C
, the data line
42
, the ground electrode
20
, the source electrode
38
and the drain electrode
40
are provided on the gate insulating film
12
.
The data line
42
, the ground electrode
20
and the source and drain electrodes
38
and
40
are formed by depositing a metal material using the CVD technique or the sputtering technique and then patterning the metal material. After the source and drain electrodes
38
and
40
were patterned, the ohmic contact layer
16
at an area corresponding to the gate electrode
36
also is patterned to expose the active layer
14
. A portion of the active layer
14
exposed by the source and drain electrodes
38
and
40
serves as a channel. The data line
42
, the ground electrode
20
, and the source and drain electrodes
38
and
40
are made from chrome (Cr) or molybdenum (Mo).
Referring to
FIG. 4D
, a first protective layer
18
are provided on the gate insulating layer
12
.
The first protective layer
18
is formed by depositing an inorganic insulating material on the gate insulating layer
12
in such a manner to cover the data line
42
, the ground electrode
20
and the source and drain electrodes
38
and
40
and then patterning it. The first protective layer
18
is preferably made from silicon nitride (SiN
x
) or silicon oxide (SiO
x
), etc.
The first protective layer is provided with a first ground contact hole
24
b
and a first drain contact hole
24
a
. The ground electrode
20
is exposed by the first ground contact hole
24
b
passing through the first protective layer
18
. The drain electrode
40
is exposed by the first drain contact hole
24
a
passing through the first protective layer
18
.
Referring to
FIG. 4E
, an organic insulating layer
22
are provided on the first protective layer
18
. The organic insulating layer
22
is formed by depositing an organic insulating material, such as an acrylic organic compound, Teflon, BCB (benzocyclobutene), Cytop or PFCB (perfluorocyclobutane), etc., on the first protective layer
18
and then patterning it.
This organic insulating layer
22
is provided with a second drain contact hole
26
a
and a second ground contact hole
26
b
. Each of the second drain contact hole
26
a
and the second ground contact hole
26
b
has a width smaller than each of the first drain contact hole
24
a
and the first ground contact hole
24
b
. The drain electrode
40
is exposed by the second drain contact hole
26
a
passing through the organic insulating layer
22
. The ground electrode
20
is exposed by the second ground contact hole
26
b
passing through the organic insulating layer
22
.
Referring to
FIG. 4F
, a transparent electrode
30
is provided on the organic insulating layer
22
.
The transparent electrode
30
is formed by depositing a transparent conductive material onto the organic insulating layer
22
and then patterning the deposited transparent conductive material. The transparent electrode
30
is made from a transparent material such as indium-tin-oxide (ITO), indium-zinc-oxide (IZO) or indium-tin-zinc-oxide (ITZO).
The transparent electrode
30
is electrically connected, via the second drain contact hole
26
a
, to the drain electrode
40

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