X+2X adder with multi-bit generate/propagate circuit

Details X+2X adder with multi-bit generate/propagate circuit X+2X adder with multi-bit generate/propagate circuit

1997-07-07

1999-02-23

Mai, Tan V.

Boots, shoes, and leggings

364788, 36475401, G06F 750

Patent

active

058751254

ABSTRACT:
The computation speed of a fast X+2X adder is improved by restructuring the carry generate/propagate logic. The adder is implemented with a multi-bit generation/propagation circuit which takes full advantage of the fact that in the X+2X computation, the input X is left-shifted by one bit and then added to itself. Significantly simplified multi-bit carry generate and propagate functions, and therefore fast circuits, are the result.

REFERENCES:
patent: 4682303 (1987-07-01), Uya
patent: 5426599 (1995-06-01), Machida

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