WSI decoder and patch circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307219, 307465, H03K 19003

Patent

active

051401894

ABSTRACT:
Externally formed connections are made to a wafer scale integration (WSI) type of semiconductor device to accomplish wafer level defect avoidance and includes the utilization of a relatively small external shorting block or patch circuit for implementing predetermined shorting connections, such as jumpers, on a diode decoder circuit on the wafer to program an address of a defective primary site into a register associated with a predetermined spare site for substituting the spare site for a defective primary site when power is applied to a fully processed WSI wafer having (n+r) sites including (n) primary sites and (r) spare sites and where n primary sites are required to perform a predetermined circuit function.

REFERENCES:
patent: 4800302 (1989-01-01), Marum
"WSI Signal and Data Processor Development", Joe E. Brewer et al., GOMAC Proceedings 1988, four pages.
"8 Megabit Wafer Scale SRAM", Ron Bourassa et al, GOMAC Proceedings, 1989, pp. 1-4.
"Development of Avionics Based on WSI Technology", Joe E. Brewer, Avionics Technical Symposium, Naval Post Graduate School, Nov. 1989, pp. 1-5.
"WSI Modular Packaging", Joe E. Brewer et al, Proceedings of Internation Symposium . . . System Integration Conference, Nov., 1990, pp. 1-12.
"Practical Considerations for WSI Based Systems" Joe E. Brewer, International Conf. on Wafer Scale Integration, Jan., 1991, pp. 1-7.

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