Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
1999-10-15
2001-11-20
Elms, Richard (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185240, C365S185040, C365S230030
Reexamination Certificate
active
06320791
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a writing apparatus for a non-volatile semiconductor memory device, and more particularly to a non-volatile semiconductor memory device with an extended lifetime because of prevention of excessive writing.
2. Background of the Invention
In recent years, flash memories have come into widespread use as electrically re-writable non-volatile semiconductor memory devices. An example of a flash memory of the past is noted in the Japanese Unexamined Patent Publication (KOKAI) No. 07-36787, the flash memory disclosed in that publication being shown in FIG.
9
.
The flash memory device shown in
FIG. 9
has a plurality of flash memories, wherein verification is performed when performing a write operation and, if a write operation fails, only the memory that had the failed write operation is written again.
In the above-noted flash memory device, however, when a write operation fails, because data is written into the entirety of one flash memory, there is the problem of excessive writing, this leading to a shortening of the life of the flash memory.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to improve on the above-noted drawback in the prior art, by providing a novel non-volatile semiconductor memory device writing apparatus which extends the life of a semiconductor memory device by preventing excessive writing.
Another object of the present invention is to provide a novel non-volatile semiconductor memory device writing apparatus, wherein a large-capacity flash memory is divided into blocks and each block is written into simultaneously so as to shorten the writing time, and reduce a number of cells connected to each bit line or word line, thereby reducing the number of times stress is applied to a selected cell.
To achieve the above-noted object, the present invention has the following basic technical constitution.
Specifically, the first aspect of the present invention is a writing apparatus for a non-volatile semiconductor memory device in which data is written into a flash memory and written data being verified, whereby only data not having been written properly in the memory is rewritten therein, wherein the writing apparatus comprising exclusive-NOR circuit which compares write data with verified data and generates write data to be rewritten thereinto, based on a result of the comparison.
In the second aspect of the present invention, the exclusive-NOR circuit comprises a plurality of exclusive-NOR circuits, the number of which being identical to that of the write data.
In the third aspect of the present invention, the write data is stored in a data buffer while a data read out for being verified, is stored in a read buffer.
The fourth aspect of the present invention is a writing apparatus for a non-volatile semiconductor memory device in which data is written into a flash memory and written data being verified, whereby only a data not having been written properly in the memory is rewritten therein, wherein this writing apparatus comprises a plurality of flash memories.
The fifth aspect of the present invention is a writing apparatus for a non-volatile semiconductor memory device in which data is written into a flash memory and written data being verified, whereby only data not having been written properly in the memory is rewritten therein, wherein a plurality of the flash memories are provided and each one of the flash memories comprising a data buffer to store write data, a read buffer to store read-out data and a write controlling means for simultaneously writing each data stored in the respective data buffers into the respective memories, and further wherein the writing apparatus being provided with an address buffer for designating a same address for each memory, the write controlling means being provided with a plurality of exclusive-NOR circuits the number of which being identical to that of write data, the exclusive-NOR circuit comparing the write data with verified data and generating write data to be rewritten thereinto, based on a result of the comparison so that rewriting operation is carried out.
A non-volatile semiconductor memory device writing apparatus according to the present invention is one in which data is written into a flash memory and verified, wherein data that was verified as not having been written properly is written once again, this semiconductor memory device having a write signal generation means which compares the write data at an address with verification data and which re-writes only selected data bits that had not been completely written.
It is therefore possible to prevent excessive writing, thereby lowering the stress on the flash memory and enabling its life to be extended.
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Elms Richard
McGuireWoods LLP
NEC Corporation
Nguyen Vanthu
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