Write strategy with multi-stage delay cell for providing...

Details Write strategy with multi-stage delay cell for providing... Write strategy with multi-stage delay cell for providing...

2005-09-29

2008-03-11

Cox, Cassandra (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

C327S327000, C327S291000

Reexamination Certificate

active

07342430

ABSTRACT:
Present invention provides a method and apparatus for generating multiple phase shifted clocks with clocks delayed from EFM clock.

REFERENCES:
patent: 5561692 (1996-10-01), Maitland et al.
patent: 6031401 (2000-02-01), Dasgupta
patent: 6775217 (2004-08-01), Kato
patent: 6876186 (2005-04-01), Gupta
patent: 6950956 (2005-09-01), Zerbe et al.
patent: 7010014 (2006-03-01), Percey et al.

Affiliated with

Also associated with

Rating

Write strategy with multi-stage delay cell for providing... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Write strategy with multi-stage delay cell for providing..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Write strategy with multi-stage delay cell for providing... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3967245