Write speed-up circuit for integrated data memories

Details Write speed-up circuit for integrated data memories Write speed-up circuit for integrated data memories

1975-11-26

1977-05-10

Fears, Terrell W.

Communications: electrical

Digital comparator systems

307238, 357 43, G11C 1140

Patent

active

040231488

ABSTRACT:
Modern bipolar cross coupled memory cells for high density arrays use diodes as coupling elements from the cell to the bit lines. The write operation of these cells requires a high amount of current if the current gain of the cell transistors is high. The time required to perform a write operation is prolonged significantly due to the inherent capacitors in the cell known as the Miller effect. The described circuit completely eliminates the Miller effect during the write operation and makes the required write current completely independent of the current gain of the cell transistors.
In the present invention this is accomplished by dropping the word line of such a cell from a stand-by potential to a select potential, so that the inner cell nodes are equally discharged, without disturbing the state of the cell, after which the word line is pulsed up to an intermediate potential between the select potential and the stand-by potential.

REFERENCES:
patent: 3949385 (1976-04-01), Sonoda
patent: 3953839 (1976-04-01), Dennison

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