Write protection method and apparatus for an EEPROM

Details Write protection method and apparatus for an EEPROM Write protection method and apparatus for an EEPROM

1990-04-12

1991-09-10

Popek, Joseph A.

Static information storage and retrieval

Floating gate

Particular biasing

365195, 364200, G11C 1600, G11C 700, G06F 1214

Patent

active

050479822

ABSTRACT:
The subject invention provides an apparatus for controllably programming an EEPROM, thereby reducing the likelihood of an inadvertent EEPROM write. The apparatus includes a first circuit which repeatedly produces a pseudo address signal at a preselected frequency. A second circuit receives the pseudo address signal and deliveries a write-enable signal to the EEPROM in response to receiving the pseudo address signal a preselected number of times. A third circuit delivers an address signal and a corresponding data signal to the EEPROM during at least a portion of the production of the write-enable signal. The address signal is indicative of an address location in said EEPROM and the data signal corresponds to the data to be stored in the EEPROM address location.

REFERENCES:
patent: 4578774 (1986-03-01), Muller
patent: 4864542 (1989-10-01), Oshima et al.

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