Static information storage and retrieval – Floating gate – Data security
Patent
1997-04-02
2000-02-29
Phan, Trong
Static information storage and retrieval
Floating gate
Data security
36518511, 36518533, G11C 1604
Patent
active
060317574
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to integrated circuit, non-volatile memory devices; and more particularly to floating gate memory devices incorporating memory write protection features.
2. Description of Related Art
Flash memory based on floating gate transistor memory cells, provides non-volatile storage, which a user can program and erase while it is mounted in a system. Because flash memory is non-volatile, it is suitable for storing computer programs which are executed by the system. However, because it is possible that a user may mistakenly erase or program over the computer program, or that the data in the flash memory may otherwise be mistakenly altered, the use of flash memory for storing programs must be carefully managed. For example, programs which are executed when a system boots up, has traditionally been stored in read-only memory (ROM), such as mask ROM, which cannot be mistakenly changed by the user.
Flash memory has been developed with write protection features to reduce the likelihood that data in the flash memory will be mistakenly changed. For example, in U.S. Pat. No. 5,197,034, entitled Floating Gate Non-Volatile Memory with Deep Power Down and Write Lock-Out, invented by Fandrich et al., a method for protecting data stored in a certain block, referred to as the "boot block", of a flash memory array is described. The Fandrich et al. patent describes a system in which write lock-out protection circuitry is provided for the "boot block" to help maintain data integrity in the "boot block". Other blocks in the array do not have write lock-out protection circuitry associated with them, according to the Fandrich et al. patent. To enable the write lock-out circuitry, a control input having one of three states, namely logic 0, logic 1, and very high voltage, is provided. When the control input is at logic 0, a deep power down signal is generated to switch the memory into a substantially powered-off state to save power consumption. When the control input is at logic 1, the device is in normal operation. When the control input is in very high voltage, the boot block can be updated by erase or program operations. This method of protecting stored data has been used in some products manufactured by Intel Corporation of Santa Clara, Calif. For example, the 28F008BV-T/B, so called "Smart Voltage Boot Block Flash Memory Family" incorporates this feature (See Intel Flash Memory Data Book, Vol 1, 1996, pp 5-1 to 5-56, especially page 5-21). Table 1 describes the write protection method used in this Intel product.
TABLE 1 ______________________________________
Write Protection Truth Table of Intel 28F008BV
Write Protection Provided
V.sub.PP RP WP Block Block
Regular Block
______________________________________
V.sub.IL X X Locked Locked
.gtoreq.V.sub.PPLK
V.sub.IL
X Locked Locked
.gtoreq.V.sub.PPLK
V.sub.HH
X Unlocked
Unlocked
.gtoreq.V.sub.PPLK
V.sub.IH
V.sub.IL Locked Unlocked
.gtoreq.V.sub.PPLK
V.sub.IH
V.sub.IH Unlocked
Unlocked
______________________________________
Another approach has been applied to write protection, exemplified by the Advanced Micro Devices product AM29F080 (See AMD Flash Memory Book, 1996, pp. 1-163 to 1-196, especially 1-172). According to the AMD approach, the sector protect feature is enabled using programming equipment at the user's site. After the feature is enabled for a particular sector, both program and erase operations are disabled. Nonetheless, this feature allows temporary unprotection of previously protected sectors, by activating a reset pin to a very high voltage. During this mode, formerly protected sectors can be programmed or erased. Once the very high voltage is taken away from the reset pin, all previously protected sectors are protected again, according to the AMD architecture.
The Intel approach and the AMD approach do not provide significant flexibility to the user in selecting sectors of the flash memory device to be protected. In the
REFERENCES:
patent: 5097445 (1992-03-01), Yamauchi
patent: 5197034 (1993-03-01), Fandrich et al.
patent: 5349558 (1994-09-01), Cleveland et al.
patent: 5414664 (1995-05-01), Lin et al.
patent: 5526307 (1996-06-01), Yiu et al.
patent: 5530673 (1996-06-01), Tobita et al.
patent: 5619451 (1997-04-01), Costabell et al.
"Smart Voltage Boot Block Flash Memory Family", Intel Flash Memory Data Book, vol. 1, 1996, pp. 5-1 to 5-56.
"Advanced Micro Devices product Am29F080", AMD Flash Memory Book, 1996, pp. 1-163 to 1-196.
Chang Kuen-Long
Cheng Yao-Wu
Chuang Weitong
Hung Chun-Hsiung
Liu Yin-Shang
Macronix International Co. Ltd.
Phan Trong
LandOfFree
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