Write protected memory

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Patent

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Details

G06F 1300

Patent

active

044893809

ABSTRACT:
An interactive terminal includes a central processor unit (CPU) having a microprocessor and a random access memory (RAM). Signals from the microprocessor place the RAM in a write protect mode. If the RAM receives a write instruction from the microprocessor when the RAM is in the write protect mode, then an illegal condition is indicated and a nonmaskable interrupt is generated to allow the terminal to recover. When the RAM is in the write protect mode, signals from the microprocessor restore the RAM to its normal read/write mode.

REFERENCES:
patent: 4298934 (1981-11-01), Fischer

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