Write head with switchable impedance and method for...

Dynamic magnetic information storage or retrieval – General processing of a digital signal – Head amplifier circuit

Reexamination Certificate

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Details

C360S068000

Reexamination Certificate

active

06487030

ABSTRACT:

TECHNICAL FIELD
The present invention relates generally to write heads for writing data to a magnetic storage medium, and more particularly, to a write head with a switchable impedance.
BACKGROUND OF THE INVENTION
Write heads are devices which convert an electrical signal into a magnetic force which magnetizes a localized area of a magnetic storage medium such as a surface of a magnetic disk. The surface of the disk is magnetized in different directions according to a pattern derived from a code to store data on the disk.
A diagram of a conventional write head
8
is shown in
FIG. 1. A
coiled inductor
10
is wrapped around a magnetic core
12
which is suspended above a magnetic disk
14
. The core
12
includes a gap
16
. Current is drawn through the inductor
10
in a forward direction which induces a forward magnetic field in the core
12
. The forward magnetic field traverses the gap
16
near a top surface
18
of the disk
14
and magnetizes the surface
18
in a forward direction. The direction of current in the inductor
10
may be reversed to generate a reverse magnetic field in the core
12
. The surface
18
of the disk
14
near the gap
16
is then magnetized in a reverse direction. Periodic changes in the direction of the magnetism in the surface of the disk
14
may be created by moving the write head
8
relative to the disk
14
and changing the direction of current in the inductor
10
to store data according to well-known methods.
A conventional circuit
20
for controlling an inductor
22
for a write head is shown in FIG.
2
. An H-bridge circuit
24
drives current into the inductor
22
according to a control signal generated by a control logic circuit
26
. The H-bridge circuit
24
includes a first high-side transistor
28
and a first low-side transistor
30
connected in series between a voltage source V
cc
an and a ground voltage reference. The H-bridge circuit
24
also includes a second high-side transistor
32
and a second low-side transistor
34
connected in series between the voltage source V
cc
and the ground voltage reference. The connection between the first high-side transistor
28
and the first low-side transistor
30
includes a first terminal
36
of the H-bridge circuit
24
. Similarly, the connection between the second high-side transistor
32
and the second low-side transistor
34
includes a second terminal
38
of the H-bridge circuit
24
.
The H-bridge circuit
24
drives current through the inductor
22
according to the control signal generated by the control logic circuit
26
and provided from a port
40
. The control signal generated by the control logic circuit
26
is a digital control signal having a high voltage or a low voltage which controls a direction of current driven in the inductor
22
. If the control signal is high, the high control signal is applied to render the second high side transistor
32
and the first low side transistor
30
conductive. The high control signal is inverted by an inverter
42
and applied to render the first high-side transistor
28
nonconductive. The high control signal is also inverted by an inverter
44
and is applied to the second low-side transistor
34
to render it nonconductive. Current is then directed from the voltage source V
cc
through the second high side transistor
32
, the second terminal
38
, the inductor
22
, the first terminal
36
, and then through the first low side transistor
30
to the ground voltage reference. As current flows through the inductor
22
from the second terminal
38
to the first terminal
36
, a magnetic field is generated in a core wrapped by the inductor
22
in a first direction such that the core may magnetize a surface of a magnetic disk in the first direction.
Periodically the control logic circuit
26
reverses the voltage of the control signal provided at the port
40
to change the direction of the current in the inductor
22
. If the control signal is switched from a high voltage to a low voltage, the second high side transistor
32
and the first low side transistor
30
are rendered nonconductive. The control signal is inverted by the inverters
42
and
44
such that the first high side transistor
28
and the second low side transistor
34
are rendered conductive. Current is then directed from the voltage source V
cc
through the first high side transistor
28
, the first terminal
36
, the inductor
22
, the second terminal
38
, and the second low side transistor
34
to the ground voltage reference. As current flows in the inductor
22
from the first terminal
36
to the second terminal
38
a magnetic field is generated in the core wrapped by the inductor
22
in a second direction. The core is now capable of magnetizing the surface of the magnetic disk in the second direction. The voltage of the control signal is switched rapidly when the circuit
20
is operating to change the direction of the magnetism in the surface of the disk such that data may be stored in the disk as described above.
When the direction of current in the inductor
22
is changed in response to a change in the control signal, oscillations occur in the current in the inductor
22
due to the existence of parasitic effects in the circuit
20
. A plot of the current in the inductor
22
during a change in the control signal is shown in FIG.
3
. The moment the control signal changes the current in the inductor
22
begins to change direction as shown by a point
50
. Following the change in the control signal the current in the inductor
22
oscillates with an overshoot
52
, an undershoot
54
, and an overshoot
56
before settling to a steady current
58
. The undershoot
54
is particularly hazardous because it can demagnetize the core wrapped by the inductor
22
and erase data stored nearby in a magnetic disk. The overshoot
52
may also, under some circumstances, put data stored on the magnetic disk at risk.
A conventional method for minimizing the oscillations shown in
FIG. 3
is a modified circuit
60
shown in FIG.
4
. The circuit
60
is similar to the circuit
20
shown in
FIG. 2
, and elements common to both circuits
60
and
20
have the same reference numerals.
The circuit
60
includes a damping resistor
62
connected between the first terminal
36
and the second terminal
38
. The damping resistor
62
is thus coupled in parallel with the inductor
22
. When the circuit
60
is operating to provide current to the inductor
22
, some current is drawn through the damping resistor
62
bypassing the inductor
22
. The damping resistor
62
damps oscillations in the current in the inductor
22
after the direction of the current has been changed. In particular, the damping resistor
62
reduces the number of oscillations and substantially minimizes any undershoot in the oscillations in the current in the inductor
22
.
The reduction in the number of oscillations permits the current in the inductor
22
to settle to a steady amount more rapidly after a change in direction. After a steady current is reached an area of a magnetic disk is magnetized in a selected direction and the direction of the current in the inductor
22
may be reversed. The reduction in oscillations permits an increase in the frequency of directional changes in the current in the inductor
22
and therewith a reduction in the period of time needed to write data to a magnetic disk. In other words, one benefit of the damping resistor
62
is that the writing frequency of the write head may be increased.
While the damping resistor
62
moderates oscillations in current in the inductor
22
, it also dissipates power as current is drawn through it. When the current in the inductor
22
is steady, there is a small voltage drop between the first terminal
36
and the second terminal
38
and power dissipation in the damping resistor
62
is minimal. However, when the direction of current in the inductor
22
is changed, a substantially higher voltage is applied across the inductor
22
and the damping resistor
62
. As a result, the damping resistor
62
dissipates

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