Write-driver circuit

Details Write-driver circuit Write-driver circuit

2000-03-07

2001-06-26

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

C327S423000, C327S424000, C327S374000, C327S494000, C327S587000, C327S588000, C363S059000, C363S098000

Reexamination Certificate

active

06252440

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a write driver circuit for recording a digital signal onto a magnetic recording medium by using a magnetic head having an inductance component, which is built in, for example, a magnetic disk apparatus or the like.
BACKGROUND ART
A conventional write driver circuit will be described with reference to FIG.
9
. In the write driver circuit, as illustrated in
FIG. 9
, the collectors of NPN transistors Q
21
and Q
22
are connected to a power input terminal (Vcc), the collector of an NPN transistor Q
23
is connected to the emitter of the NPN transistor Q
21
, the collector of an NPN transistor Q
24
is connected to the emitter of the NPN transistor Q
22
, the emitters of the NPN transistors Q
23
and Q
24
are connected to each other, and a current source I
1
is connected between the emitters of the NPN transistors Q
23
and Q
24
and the ground terminal.
A resistor R
25
is connected between the collector and base of the NPN transistor Q
21
, a resistor R
26
is connected between the collector and base of the NPN transistor Q
22
, the collector of an NPN transistor Q
25
is connected to the base of the NPN transistor Q
21
, the collector of an NPN transistor Q
26
is connected to the base of the NPN transistor Q
22
, the emitters of the NPN transistors Q
25
and Q
26
are connected to each other, and a current source I
2
is connected between the emitters of the NPN transistors Q
25
and Q
26
and the ground terminal.
The bases of the NPN transistors Q
23
and Q
25
are connected to each other, the bases of the NPN transistors Q
23
and Q
25
are provided with an input terminal WD of a write signal, the bases of the NPN transistors Q
24
and Q
26
are connected to each other, and the bases of the NPN transistors Q
24
and Q
26
are provided with an input terminal WDB of a write signal.
In the write driver circuit, one (X) of terminals of a magnetic head HD is connected to the connection point of the NPN transistors Q
21
and Q
23
and the other terminal Y of the magnetic head HD is connected to the connection point of the NPN transistors Q
22
and Q
24
.
In the write driver circuit having such a construction, write signals of opposite phases are supplied to the input terminals WD and WDB. For example, when a high-level (H) write signal is supplied to the input terminal WD and a low-level (L) write signal is supplied to the input terminal WDB, the NPN transistors Q
21
and Q
24
are turned off, the NPN transistors Q
22
and Q
23
are turned on, and a current is passed to the magnetic head HD in the direction from the terminal Y to the terminal X. When the states of the write signals are opposite, the NPN transistors Q
21
and Q
24
are turned on, the NPN transistors Q
22
and Q
23
are turned off, and a current is passed to the magnetic head HD in the direction from the terminal X to the terminal Y.
The conventional write driver circuit has, however, drawbacks as described hereinbelow caused by the fact that the magnetic head HD has an inductance. Specifically, a counter electromotive force occurring across the magnetic head HD when the current passing through the magnetic head HD is reversed is expressed by the following expression (1) where the current passing through the magnetic head HD is i, the counter electromotive force (voltage across the head terminals) occurring across the magnetic head HD is V, the inductance of the magnetic head HD is L, and t denotes time.
V=L
(
di/dt
)  (1)
From the relation of Expression (1), time required for the current passing through the magnetic head HD to be reversed is proportional to each of the inductance L of the magnetic head HD and the current passing through the magnetic head HD and is inversely proportional to the counter electromotive force V. Consequently, the larger the counter electromotive force V is, the shorter the time required for the current passing through the magnetic head HD to be reversed is, because the energy accumulated by the inductance L of the magnetic head HD is discharged in accordance with the product of the level of the counter electromotive force and time.
The operation in a transition period in which, for example, an H-level write signal is supplied to the input terminal WD in a state where an L-level write signal is supplied to the input terminal WD and an L-level write signal is supplied to the input terminal WDB, the state of the write signal is changed to a state in which the H-level write signal is supplied to the input terminal WDB, and the direction of the write current passing through the magnetic head HD is changed from the direction from the terminal X to the terminal Y to the direction from the terminal Y to the terminal X will now be described.
In the write driver circuit, when the state of the write signal is reversed, the H-level write signal is supplied to the input terminal WD, and the L-level write signal is supplied to the input terminal WDB, the NPN transistor Q
25
is turned on and a current of the current source I
2
is passed to the resistor R
25
, so that the base potential of the NPN transistor Q
21
is decreased from the power source voltage by an amount corresponding to a voltage drop caused by the resistor R
25
and the current source I
2
. Since the NPN transistor Q
21
is not completely turned off at this time, that is, remains in the on-state, a voltage Vx at the terminal X of the magnetic head HD is dropped from the base potential of the NPN transistor Q
21
only by a base-emitter voltage Vbe of the NPN transistor Q
21
.
On the other hand, when the NPN transistor Q
26
is turned off, the base potential of the NPN transistor Q
22
is pulled up to the power source voltage and the NPN transistor Q
22
is turned on. A voltage Vy at the terminal Y of the magnetic head HD is consequently dropped from the power source voltage only by the base-emitter voltage Vbe of the NPN transistor Q
22
.
From the above, when the power voltage is Vcc, the voltage difference between the terminals X and Y of the magnetic head HD is expressed by the following expression (2).
|Vy−Vx|=|
(
Vcc
−Vbe)−(
Vcc
−I
2
·R
25
−Vbe)|=I
2
·R
25
  (2)
This similarly applies to the case where the reversing direction of the current passing through the magnetic head HD is opposite and the voltage difference between the terminals X and Y of the magnetic head HD in this case is expressed by the following expression (3).
|
Vy−Vx|=|
(
Vcc
−I
2
·R
26
−Vbe)−(
Vcc
−Vbe)|=I
2
·R
26
  (3)
As described above, since the voltage difference occurring between the terminals X and Y of the magnetic head HD in a transient period is determined by the resistor R
25
or R
26
and the current source I
2
, the counter electromotive force generated by the magnetic head HD is regulated by the voltage difference occurring between the terminals X and Y of the magnetic head HD.
In order to reverse the current passing through the magnetic head HD at high speed, it is necessary to widen the voltage difference between the terminals X and Y of the magnetic head HD so that the counter electromotive force generated by the magnetic head HD is not regulated. For this purpose, it is preferable to widen the voltage difference between both terminals of the magnetic head HD by increasing the current of the current source I
2
while not increasing the value of resistance of each of the resistors R
25
and R
26
for the following reason. When the value of resistance is increased, the area of the resistance region becomes large, so that high packing density cannot be achieved. Moreover, the parasite capacity by the resistance region comes to be unignorable and it causes a slow current reversal.
A state after the reversal of the write current passing through the magnetic head HD from the direction from the terminal X to the terminal Y to the direction from the terminal Y to the terminal X is finished will now be considered. In this

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