Write drive apparatus

Details Write drive apparatus Write drive apparatus

2000-06-21

2003-03-11

Faber, Alan T. (Department: 2651)

Dynamic magnetic information storage or retrieval

General processing of a digital signal

Head amplifier circuit

C360S068000

Reexamination Certificate

active

06532123

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to a write driver apparatus for writing an information signal on a magnetic record carrier and hard disk drive provided with the write driver apparatus. A write driver apparatus as defined above known from U.S. Pat. No. 5,668,676.
The write driver apparatus is meant for incorporation in a hard disk drive (HDD). The known write driver apparatus has the disadvantage that it does not function properly for very high datarates.
SUMMARY OF THE INVENTION
The invention aims at providing an improved write driver circuit which is capable of recording data with higher datarates than now possible with known driver apparatuses.
The write driver circuit in accordance with the invention comprises
a first and a second input terminal (
20
,
22
) for receiving the information signal,
a first point of a first constant potential (+),
a second point of a second constant potential (−),
a write head combination (
32
) having a first and a second input (
34
,
36
),
a first current sink having a first transistor (T
3
) of a first type, having a first main electrode coupled to the first point of constant potential, having a second main electrode coupled to the first input (
34
) of the write head combination via a first impedance (
38
), and a control electrode coupled to the first input terminal (
20
),
a second current sink having a second transistor (T
4
) of the first type, having a first main electrode coupled to the first point of constant potential, having a second main electrode coupled to the second input (
36
) of the write head combination via a second impedance (
42
), and a control electrode coupled to the second input terminal (
22
),
a first current source having a third transistor (T
1
) of the first type, having a first main electrode coupled to the first input (
34
) of the write head combination, having a second main electrode coupled to the second point of constant potential, and a control electrode coupled to the first input terminal (
20
),
a second current source having a fourth transistor (T
2
) of the first type, having a first main electrode coupled to the second input of the write head combination, having a second main electrode coupled to the second point of constant potential, and a control electrode coupled to the second input terminal (
22
).
The invention is based on the recognition that the high parasitic output capacitance, as result of the output transistors having their collectors coupled to the output of the write driver circuit, impede the use of known write driver circuits for recording information at higher data rates. By adopting a circuit in which the output transistors are all of the same type, the parasitic output capacitance is reduced, so that recording at higher data rates becomes possible.
Preferably, with an information signal of a first polarity supplied to the to first and second input terminals (
20
,
22
), the first current source is adapted to generate a first current of predetermined amplitude (1+x).I, the first current sink is adapted to sink a second current of amplitude substantially equal to x.I, where x is a constant smaller than 1, and the second current sink is adapted to sink a third current of amplitude substantially equal to I via the write head combination (
32
), and wherein with an information signal of a second polarity, opposite said first polarity, supplied to the first and second input terminals (
20
,
22
), the second current source is adapted to generate a current substantially equal to (1+x).I, the second current sink is adapted to sink a current of amplitude substantially equal to x.I, and the first current sink is adapted to sink a current of amplitude substantially equal to I via the write head combination (
32
). The write driver apparatus in accordance with the invention enables the output impedance of the write driver circuit to be adapted to the impedance of the write head combination, which actually comprises a write head and an electrical interconnection of up to a few cm long, so that an optimal driving of the write head can be obtained. The invention makes it possible to use NPN transistors only in the output circuit of the write driver circuit, which enables the accommodation of the circuit in a smaller IC, because it requires a smaller chip surface. Further, when adopting the measure of claim 8, a more symmetric driving of the write head combination can be obtained.


REFERENCES:
patent: 5612828 (1997-03-01), Brannon et al.
patent: 5668676 (1997-09-01), Voorman et al.
patent: 6215607 (2001-04-01), Ngo
patent: 6246269 (2001-06-01), Schuler et al.

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