Write control circuitry and method for a memory array...

Details Write control circuitry and method for a memory array... Write control circuitry and method for a memory array...

2007-06-14

2008-12-30

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

C365S189090, C365S226000, C365S230030

Reexamination Certificate

active

07471590

ABSTRACT:
Write control circuitry and control method are provided for a memory array configured with multiple memory subarrays. The write control circuitry includes multiple subarray write controllers associated with the multiple memory subarrays, each subarray write controller selectively enabling a local write control signal to its associated memory subarray. The selectively enabling is responsive to a received subarray select signal, wherein only one subarray select signal is active at a time. At least some subarray write controllers are powered at least in part via a switched power node, wherein powering of the switched power node is distributively implemented among the subarray write controllers. In one example, the distributively implemented powering of the switched power node is accomplished via multiple inverters distributed among the subarray write controllers, each inverter having an output coupled to the switched power node, and an input coupled to receive a global write enable signal.

REFERENCES:
patent: 2005/0207242 (2005-09-01), Yabe

Affiliated with

Also associated with

Rating

Write control circuitry and method for a memory array... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Write control circuitry and method for a memory array..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Write control circuitry and method for a memory array... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4029234